Scientific Publications
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Research Categories
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Computer Science & Engineering
Core computing paradigms, algorithm design, software architectures, advanced computing theory, and hardware engineering.
Computer Networks
Network architectures, wireless ad-hoc protocols, vehicular networks (VANET), buffering, and communications.
Electronics Department
Circuits, semiconductor devices, flexible electronics, solar array modeling, signal processing, and photonics.
Civil Engg
Structural analysis, thermal stability of fluid layers, environmental infrastructure, and applied materials engineering.
Electronics Department Publications (8)
Modeling of Solar array and Analyze the Current Transient Response of Shunt Switch Voltage Regulator in Spacecraft Power Conditioning Unit
Spacecraft bus voltage is regulated by power conditioning unit using switching shunt voltage regulator having solar array cells as the primary source of power. This source switches between the bus loads and the shunt switch for fine control of spacecraft bus voltage. The effect of solar array cell capacitance [5][6] along with inductance and resistance of the interface wires between solar cells and power conditioning unit[1], generates damped sinusoidal currents superimposed on the short circuit current of solar cell when shunted through switch. The peak current stress on the shunt switch is to be considered in the selection of shunt switch in power conditioning unit. The analysis of current transients of shunt switch in PCU considering actual spacecraft interface wire length by illumination of solar panel (combination of series and parallel solar cells) is difficult with hardware simulation. Software simulation by modeling solar cell is carried out for a single string (one parallel) in Pspice [6]. Since in spacecrafts number of parallels and interface cable length are variable parameters the analysis of current transients of shunt switch is carried out by modeling solar array with the help of solar cell model[6] for the actual spacecraft condition.
Quantum Computation: A Review
In the classical model, the fundamental building block is represented by bits exists in two states a 0 or a 1. Computations are done by logic gates on the bits to produce other bits. By increasing the number of bits, the complexity of problem and the time of computation increases. A quantum algorithm is a sequence of operations on a register to transform it into a state which when measured yields the desired result. This paper provides introduction to quantum computation by developing qubit, quantum gate and quantum circuits
Designing Geometric Parameters of Axisymmetrical Cassegrain Antenna and Corrugated Horn Feed for Circularly Polarized Communications
This paper presents steps in designing dimensions of antenna and feed in axisymmetrical Cassegrain Antennas. Corrugated conical horns are used as feeds in applications with circular polarization. In the initial design steps, diameter of the main reflector is determined considering communication link budget, then feed dimensions are designed to create optimum aperture efficiency. In the last step of design, considering feed dimensions and the amount of its center phase displacements with respect to its aperture plane, dimensions of subreflector is determined to avoid additional blockage. To illustrate the procedure, an applicative design example is presented in Xband
DEVELOPMENT OF HYBIRD PHOTOVOLTAIC-WIND GENERATION SYSTEM
Recent development of small-scale energy technologies and global increase in the energy demand has made the renewable energy systems more popular. Renewable energy sources such as the sun, wind etc offers clean and abundant energy depending on weather conditions. Hybridizing solar and wind power sources provide a realistic form of power generation. This paper outlines the design of a hybrid power system consisting of solar photovoltaic (PV) power system, wind power system and battery storage. A control strategies for hybrid wind/photovoltaic energy system is proposed. The wind and PV are used as main energy sources, while the battery is used as back-up energy source. The paper presents the state of the art of stand-alone hybrid solar and wind systems. The modeling of hybrid system is developed in MATLAB- SIMULINK
OVERVIEW ON FLEXIBLE ELECTRONICS TECHNOLOGY
Flexible electronics is a new trend in electronics industry to handle the increasing burden on chips. It is a technology for assembling electronic circuits by mounting electronic devices on flexible thin plastic substrate. This technology is having many benefits or Advantages like their light weight, favorable dielectric properties, robust, high circuit density and conformable nature. Devices and circuits can be rolled away when not required. These types of devices offer properties like clarity, dimensional stability, low coefficient of thermal expansion, elasticity etc. Recent advances in organic and inorganic based electronics proceeds on flexible substrate, offer substantial rewards in terms of being able to develop displays that are thinner, lighter and can be rolled or folded when not in use. This paper will discuss about the properties, preparation methods, applications and challenges in this rapidly growing industry.
The Impact of Line Resistance on the Performance of Controllable Series Compensator for Improving Voltage Stability
In recent years controllable FACTS devices are increasingly integrated into the transmission system. FACTS devices that provide series control such as Controllable Series Compensator (CSC) has significant effect on the voltage stability of Electric Power system. In this work impact of line resistance on the performance of CSC in a single-load infinitive-bus (SLIB) model is investigated. The proposed framework is applied to SLIB model and obtained results demonstrates that line resistance has considerable effect on voltage stability limits and performance of CSC.
Performance of Wideband Mobile Channel with Perfect Synchronism BPSK vs QPSK DS-CDMA
Direct-sequence code-division multiple access (DS-CDMA) is currently the subject of much research as it is a promising multiple access capability for third and fourth generations mobile communication systems. The synchronous DS-CDMA system is well known for eliminating the effects of multiple access interference (MAI) which limits the capacity and degrades the BER performance of the system. In this paper, we investigate the bit error rate (BER) performance of a synchronous DS-CDMA system over a wideband mobile radio channel. The BER performance is affected by the difference in path length ΔL and the number of arriving signals N. Furthermore, the effect of these parameters is examined on the synchronous DS-CDMA system for different users’ number as well as different processing gain Gp . In this environment and under the above conditions the performances of the BPSK (Binary Phase Shift Keying) and the QPSK (Quadrature Phase Shift Keying) modulations are compared. The promising simulation results showed the possibility of applying this system to the wideband mobile radio channel.
Design of Efficient Circuits of D-Latch Using MOSFET, Sleep Transistor and Stacked Invertor Based on 32nm CMOS Technology
In past few decades an unprecedented growth is experienced by electronics industry and the credit goes to the intelligent use integrated circuits in computation purpose,telecommunications and consumer electronics. When large number of transistors is used on a single chip, more power gets dissipated in the form of heat.Heat is a very important factor while designing any circuit. Heat is the main cause of driving low power design technologies.The one-bit digital storage element plays a fundamental role in digital signal processing circuitry. D-latch („data‟ latch) is the simplest in construction, Different designs of D-Latch have been designed using CMOS inverters, Transmission Gates, sleep transistors, Pass Transistors & GDI (Gate Diffusion Input) cell that can be operated at higher frequencies. All designs have been designed using 32nm UMC CMOS technology at 5GHz clock frequency. These designs are simulated in HSPICE tool for the successful function of the D-latch. It is being widely used in a complex optical communication system. Output changes when the clock signal is enabled. All the circuits have been designed in a 32 nm UMC CMOS technology to evaluate the efficiency of the proposed approach and experimental results show a correct behavior up to 5 GHz.